Learning objective
Interrupts: Describe the role of interrupts and interrupt service routines (ISRs); their effect on the Fetch-Execute cycle; and the need to save the volatile environment while the interrupt is being serviced.
Read the explanation, check the common trap, then practise with flashcards and questions.
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Topic
Structure and role of the processor and its components
Subtopic
Interrupts
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Quick explanation
Interrupts: Describe the role of interrupts and interrupt service routines (ISRs); their effect on the Fetch-Execute cycle; and the need to save the volatile environment while the interrupt is being serviced
- This point belongs to Structure and role of the processor and its components, especially Interrupts.
- You need to be able to interrupts: Describe the role of interrupts and interrupt service routines (ISRs); their effect on the Fetch-Execute cycle; and the need to save the volatile environment while the interrupt is being serviced.
- Use the linked flashcards and practice questions to check recall, then practise applying the idea in an exam-style answer.
Why it matters
This objective helps connect Interrupts to exam-style questions, flashcards, and revision notes for Structure and role of the processor and its components.
Quick student answer
What is the primary role of an interrupt?
Direct answer
To request that the processor temporarily deal with an event
Key terms
- Interrupt: A request that causes the processor to temporarily divert from its current program so that it can deal with an event.
- Interrupt service routine (ISR): A routine executed by the processor to service an interrupt.
Common trap
Treating an interrupt as a permanent stop: An interrupt temporarily changes the processor's execution to an ISR. The original program can resume after the interrupt has been serviced.
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Related learning objectives
- The processor and its components: Explain the role and operation of a processor and its major components: • arithmetic logic unit • control unit • clock • general-purpose registers • dedicated registers, including: • program counter • current instruction register • memory address register • memory buffer register • status register.
The processor and its components
- The Fetch-Execute cycle and the role of registers within it: Explain how the Fetch-Execute cycle is used to execute machine code programs including the stages in the cycle (fetch, decode, execute) and details of registers used.
The Fetch-Execute cycle and the role of registers within it
- The processor instruction set: Understand the term ‘processor instruction set’ and know that an instruction set is processor specific. Know that instructions consist of an opcode and one or more operands (value, memory address or register). A simple model will be used in which the addressing mode will be incorporated into the bits allocated to the opcode so the latter defines both the basic machine operation and the addressing mode. Students will not be expected to define opcode, only interpret opcodes in the given context of a question. For example, 4 bits have been allocated to the opcode (3 bits for basic machine operation, eg ADD, and 1 bit for the addressing mode). 4 bits have been allocated to the operand, making the instruction, opcode + operand, 8 bits in length. In this example, 16 different opcodes are possible (24 = 16).
The processor instruction set
- Addressing modes: Understand and apply immediate and direct addressing modes. Immediate addressing: the operand is the datum. Direct addressing: the operand is the address of the datum. Address to be interpreted as meaning either main memory or register. 78
Addressing modes
- Machine-code/assembly language operations: Understand and apply the basic machine-code operations of: • load • add • subtract • store • branching (conditional and unconditional) • compare • logical bitwise operators (AND, OR, NOT, XOR) • logical • shift right • shift left • halt. Use the basic machine-code operations above when machine-code instructions are expressed in mnemonic form- assembly language, using immediate and direct addressing.
Machine-code/assembly language operations
