Pearson Edexcel GCSE (9-1) Computer Science study guide
Hardware Study Guide
Review study guide for Hardware in Edexcel Computer Science.
At a glance
study guide
Resource type
Topic
Hardware
Study guide overview
Understanding the von Neumann Architecture and Fetch-Decode-Execute Cycle
The von Neumann architecture is a foundational computer design concept where both program instructions and data are stored together in the same main memory. This unified memory space allows the Central Processing Unit (CPU) to access instru
The von Neumann architecture is a foundational computer design concept where both program instructions and data are stored together in the same main memory. This unified memory space allows the Central Processing Unit (CPU) to access instructions and data through the same pathways, which is crucial for the fetch-decode-execute cycle. During this cycle, the CPU uses various components: the control unit (CU) manages and coordinates operations; the arithmetic logic unit (ALU) performs calculations and logical operations; and registers serve as small, high-speed storage locations for temporary data. Communication between these CPU components and main memory occurs via buses: the address bus carries memory addresses for data or instructions, the data bus transmits the actual data or instructions, and the control bus carries control signals to coordinate operations. The clock synchronises all internal operations of the CPU, ensuring precise execution of each step in the cycle.
Ready to practise?
Choose your next step
Use the study guide for understanding, then switch into an active revision mode.
Related topics
Study nearby topics next
Revision hubs
