Structure and role of the processor and its components common mistakes

Common mistakes

• Confusing the MAR and MBR

  Saying that the memory address register stores the data being transferred from memory.

  Fix itThe memory address register stores the address of the memory location being accessed. The memory buffer register temporarily stores the data or instruction being transferred.

• Confusing the PC and MAR

  Stating that the program counter stores the address of the memory location currently being accessed.

  Fix itThe PC stores the address of the next instruction to be fetched. The MAR stores the address of the memory location currently being accessed.

• Treating the operand as the operation

  Stating that the operand specifies what operation the processor should perform.

  Fix itThe opcode identifies the basic machine operation and, in this model, the addressing mode. The operand supplies a value, memory address or register.

• Confusing a datum with its address

  Stating that the operand is always the value to be used.

  Fix itCheck the addressing mode: in immediate addressing the operand is the datum, but in direct addressing the operand is the address of the datum.

• Confusing a value with a memory address

  Treating LOAD 20 and LOAD #20 as equivalent instructions.

  Fix itLOAD #20 uses the immediate value 20, while LOAD 20 uses direct addressing and loads the value stored at memory location 20.

• Treating an interrupt as a permanent stop

  Saying that an interrupt ends or deletes the program currently being executed.

  Fix itAn interrupt temporarily changes the processor's execution to an ISR. The original program can resume after the interrupt has been serviced.

• Confusing bus widths

  Stating that a wider address bus transfers more data or that a wider data bus addresses more memory.

  Fix itRemember that the address bus carries memory addresses and determines the range of locations that can be addressed. The data bus carries data and determines how many bits can be transferred at once.