Logic gates revision notes

1. Logic-gate truth tables

A truth table lists every possible input combination and the corresponding output. Use 0 for false or low and 1 for true or high.

| A | NOT A | |---|-------| | 0 | 1 | | 1 | 0 |

| A | B | AND | OR | XOR | NAND | NOR | |---|---|-----|----|-----|------|-----| | 0 | 0 | 0 | 0 | 0 | 1 | 1 | | 0 | 1 | 0 | 1 | 1 | 1 | 0 | | 1 | 0 | 0 | 1 | 1 | 1 | 0 | | 1 | 1 | 1 | 1 | 0 | 0 | 0 |

AND produces 1 only when both inputs are 1. OR produces 1 when at least one input is 1. XOR produces 1 when the inputs are different. NAND is the inverse of AND, and NOR is the inverse of OR. A NOT gate has one input and reverses its value.

2. Circuit diagrams and Boolean expressions

Use the ANSI/IEEE standard 91-1984 distinctive-shape symbols when drawing these gates. A circuit can be translated into a Boolean expression by following the signal path from the inputs to the output. For example, if A and B enter an AND gate and the result is then connected to an OR gate with C, the expression is (A AND B) OR C.

Parentheses are important because they show which operation occurs first. To draw a circuit from an expression, construct the innermost operation first, then connect its output to the next gate. For example, NOT (A OR B) requires an OR gate followed by a NOT operation, or an equivalent NOR gate.

3. Completing a circuit truth table

For a circuit with several gates, add intermediate columns. Each column should represent the output of one gate. Calculate intermediate values before calculating the final output. For example, for Y = (A AND B) OR (NOT C), create columns for A AND B, NOT C, and finally their OR result. This method reduces errors and makes the reasoning traceable.

4. Half-adder

A half-adder adds two one-bit inputs, A and B. It has two outputs:

• Sum: S = A XOR B
• Carry: C = A AND B

| A | B | S (sum) | C (carry) | |---|---|---------|-----------| | 0 | 0 | 0 | 0 | | 0 | 1 | 1 | 0 | | 1 | 0 | 1 | 0 | | 1 | 1 | 0 | 1 |

Construct the circuit using one XOR gate for the sum output and one AND gate for the carry output. Both gates receive the same A and B inputs.

5. Full-adder

A full-adder also receives a carry input, usually written as Cin, as well as A and B. Its sum can be traced as A XOR B XOR Cin. Its carry output can be formed from the carry generated by A and B together with the carry generated when Cin is combined with the intermediate sum. A full-adder can therefore be understood by tracing two half-adder stages and combining their carry outputs with an OR gate.

6. Edge-triggered D-type flip-flop

An edge-triggered D-type flip-flop is used as a memory unit. It has a data input, D, and responds at a clock edge. The value presented at D is stored by the flip-flop at the relevant clock edge and remains available as the stored output until a later clock event changes it. Detailed internal operation is not required; focus on recognising its use as a one-bit memory element and tracing when its stored value changes.

Common errors

• Confusing OR with XOR: OR gives 1 for inputs 1,1, whereas XOR gives 0 for 1,1.
• Forgetting that NAND and NOR invert the output of AND and OR respectively.
• Omitting intermediate columns when completing a circuit truth table.
• Reversing the half-adder outputs: XOR is the sum and AND is the carry.
• Treating a D-type flip-flop as continuously changing with D rather than as an edge-triggered memory unit.
• Drawing a circuit that does not match the order of operations in the Boolean expression.